A common requirement for semiconductor processing and advanced packaging of integrated circuit dies including 3D and through-via approaches is assembly of thin integrated circuit dies, or increasingly, ultra-thin integrated circuit dies, to a substrate to form a completed device. The thin integrated circuit dies may be formed as a portion of a semiconductor wafer manufactured including many such integrated circuit dies in a wafer level process (“WLP”). The integrated circuit dies typically include active and passive circuit devices, such as transistors and capacitors, fabricated in a semiconductor process. A plurality of connector terminals are formed on the active surface of the integrated circuit dies while they are still at the wafer level; these connector terminals are disposed on one surface, sometimes called the “active” or “front” surface, of the semiconductor wafer. The assembly of the dies to the substrates requires that the integrated circuit dies be separated from the wafer; each integrated circuit die is then mounted with the respective connector terminals forming electrical and physical connections to a substrate.
In the conventional die assembly process, several problems are encountered which can affect the reliability and yield of the finished devices, and thus increase cost and/or lower throughput. A backgrinding operation is performed to thin the wafer including the plurality of dies. Prior to the backgrinding operation, the connector terminals are formed and extend vertically away from the face of the semiconductor wafer, the connectors are also very small. These electrical connectors may be, for example, controlled collapse chip connectors (“C4”), copper or copper alloy pillars, columns, studs or bumps, or lead based and lead-free solder connectors, which may be formed as solder columns, balls, or solder bumps or micro-bumps. The connector terminals may be of a pillar, columnar, round or ovoid shape.
In some conventional methods, a backgrinding tape is applied over the semiconductor wafer covering the substrate and electrical connector terminals. The entire semiconductor wafer including the plurality of integrated circuit dies is then inverted using the backgrinding tape as support. A mechanical grinding operation is performed on the backside of the semiconductor wafer to thin the wafer to the desired thickness. The backgrinding tape is then released by performing a cure step. The tape is removed from the connector terminals, and the assembly continues by then separating the dies from the wafer, and mounting the connector terminals of the individual dies to a substrate.
Problems observed with the conventional assembly methods include a failure of the backgrinding tape to release from the connector terminals, leaving a residue which can lead to delamination of underfill materials in later process steps; unwanted flux residue around the electrical connectors terminals, causing electrical faults, and uneven wafer thinning due to uneven stress concentrations during the backgrinding process.
The drawings, schematics and diagrams are illustrative and not intended to be limiting, but are examples of embodiments of the disclosure, are simplified for explanatory purposes, and are not drawn to scale.